A liquid crystal display has now been widely applied to products such as laptop computers, personal digital assistants (PDAs), flat-screen TVs, mobile phones, etc. for its advantages such as low radiation, small size and low power consumption. A traditional liquid crystal display drives a chip on a display panel by using an external driving chip so as to display an image, but in order to reduce the number of elements and manufacturing cost, it has been gradually developed that a driving circuit structure is directly manufactured on the display panel by using, for example, a GOA technology.
The GOA technology is to integrate a gate driving circuit of a TFT LCD (Thin Film Transistor Liquid Crystal Display) on a glass substrate to form scan driving for a liquid crystal panel. Compared with the traditional driving technology using a COF (Chip On Flex/Film), the GOA technology may reduce the manufacturing cost significantly and is highly advantageous to improving product capacity for omitting manufacturing procedure of bonding of the COF at a Gate side. Therefore, the GOA is a key technology in future development of liquid crystal panels.
As illustrated in FIG. 1, a GOA circuit of the existing liquid crystal panel generally includes a plurality of single-level GOA circuit units that are cascaded, each of which corresponds to a scan driving wire of a corresponding level. Each single-level GOA circuit unit may include a pull-up control unit {circle around (1)}, a pull-up unit {circle around (2)}, a signal downward transmission unit {circle around (3)}, a pull-down unit {circle around (4)}, a pull-down maintaining unit {circle around (5)} and a bootstrap capacitor {circle around (6)}.
In FIG. 1, the pull-up control unit {circle around (1)} is mainly used for implementing pre-charging for a pre-charging node Q(N), and usually, a carry signal ST(N−1) and a scan driving signal G(N−1) from an upper-level GOA circuit unit are input thereto. The pull-up unit {circle around (2)} is mainly used for improving a potential of a present-level scan driving signal G(N). The signal downward transmission unit {circle around (3)} is mainly used for controlling on and off of transmitting signals to a lower-level GOA circuit unit. The pull-down unit {circle around (4)} is mainly used for pulling potentials of the pre-charging node Q(N) and the present-level scan driving signal G(N) down to a low supply voltage VS S. The pull-down maintaining unit {circle around (5)} is mainly used for maintaining potentials of the pre-charging node Q(N) and the present-level scan driving signal G(N) unchanged at the low supply voltage VSS. The bootstrap capacitor {circle around (6)} is mainly used for providing and maintaining the potential of the pre-charging node Q(N), and it is helpful for the pull-up unit {circle around (2)} to output the scan driving signal G(N).
The pull-down maintaining unit {circle around (5)} actually includes an inverter. For example, the pull-down maintaining unit {circle around (5)} may adopt a Darlington inverter configuration, and a specific circuit structure thereof is illustrated in FIG. 2. The Darlington inverter may include four thin film transistors and has an Input terminal and an Output terminal. If a control signal LC is set to be a high potential signal all the time and the low supply voltage VSS is set to be a low potential signal all the time, when a high potential signal is input through the Input terminal, a low potential signal is output through the Output terminal, and when a low potential signal is input through the Input terminal, a high potential signal is output through the Output terminal. When the pull-down maintaining unit {circle around (5)} includes a Darlington inverter as illustrated in FIG. 2, a specific circuit structure thereof may be as illustrated in FIG. 3.
FIG. 4 illustrates a signal wave of the pre-charging node Q(N) in FIG. 3. Hereinafter, the technical problem faced by the present application will be stated by referring to FIGS. 3 and 4.
Referring to FIG. 4, the pre-charging node Q(N) is in a low potential before point A. At this time, transistors T52 and T54 are in an off state, a transistor T42 is in an on state, and the pre-charging node Q(N) continues to be pulled down by a low supply voltage wire VSS through the transistor T42. After point A and before point B, the carry signal ST(N−1) and the scan driving signal G(N−1) from the upper-level GOA circuit unit are in a high potential, a transistor T11 is in an on state, and the pre-charging node Q(N) is charged to a certain high potential through the transistor T11. At this time, transistors T52 and T54 are in an off state, a transistor T42 is in an off state, and the potential of the pre-charging node Q(N) is not affected by the low supply voltage wire VSS. After point B and before point C, a clock signal CK input to the pull-up unit is changed to a high potential from a low potential, and a bootstrap capacitor Cbt enables the pre-charging node Q(N) to be pulled to a certain higher potential under the function of boot strap. At this time, transistors T52 and T54 are in an on state, the transistor T42 is in an off state, and the potential of the pre-charging node Q(N) is not affected by the low supply voltage wire VSS. After point C and before point D, the scan driving signal G(N+1) from the lower-level GOA circuit unit is in a high potential, the transistor T41 is in an on state, and the pre-charging node Q(N) is pulled down to the low supply voltage wire VS S through the transistor T41. After that, the situation is the same to that before point A since the pre-charging node Q(N) continues to be in a low potential and the potential thereof continues to be pulled down by the low supply voltage wire VSS.
Here, it needs to pay close attention to the conditions of the potential of the pre-charging node Q(N) before and after point A. Actually, there exist two conditions of mutual restraint this process. Specifically speaking, when the transistor T11 is in an on state, the pre-charging node Q(N) is pre-charged to a high potential, however, this process is not completed instantly, but completed in a period of time. Thus, when the pre-charging node Q(N) is pre-charged to a certain intermediate potential, the transistors T52 and T54 are not completely in an on state, but only turned on faintly, since the potential is not high enough yet. Correspondingly, the transistor T42 will not be completely in an off state either, but only turned off faintly, as a result, it is not possible to make the pre-charging node Q(N) to be completely isolated from the low supply voltage wire VS S through the transistor T42, so that the potential of the pre-charging node Q(N) will be pulled down.
In brief, a function of the transistor T11 is to pull the pre-charging node Q(N) to a high potential, while a function of the transistor T42 is to pull the pre-charging node Q(N) to a low potential. In a long-term use of a device, such a mutually restrained charging condition will lead to a problem on reliability and cause malfunction of a GOA circuit.